AMD Xilinx Vivado and Vitis

Overview

Vivado Design Suite is a software suite for the synthesis and analysis of hardware description language designs, superseding Xilinx ISE with additional features for system-on-a-chip development and high-level synthesis

Getting Started

warning

X11 forward is needed if not using the web portal interactive desktop

To use the Xilinx Vivado software with the Xilinx FPGA there is a module available

module load xilinx/vivado-2022.1
or
module load xilinx/vitis-2023.2

There is also the Model Composer if required

module load xilinx/model-composer

Example:

[root@fpga01a ~]# module load xilinx/vivado-2022.1


=====================================================================
Vivado 2022.1 
=====================================================================

To launch this application use "vivado"

Additional Help

If you require further assistance, contact the Research Computing Team:

• Ticket-based support via RTO Request Help Portal.
• Slack support via the #rc-support channel in the ASU Research Computing workspace.
• Weekly office hours for one-on-one assistance.

We also offer Educational Opportunities and Workshops.